Memory Map

OP Name MSB Hi MSB Lo LSB Hi LSB Lo Description
Region Low High
NOP No Operation 0000 0000 0000 0000 Do nothing
RAM 0x0000 0x7FFF
HLT Halt 0000 0001 0000 0000 Halt the CPU
IO 0x8000 0x8000
JMP Unconditional Jump 0000 0010 Dst2 Dst1 Unconditionally jump to address[Dst2 Dst1]
IO Status 0x8001 0x8001
JEQ Jump Equal 0 0000 0011 Dst2 Dst1 Jump to Address[Dst2 Dst1] if Zero Flag is set to 1
Reserved 0x8002 0xBFFF
JNE Jump Not Equal 0 0000 0100 Dst2 Dst1 Jump to Address[Dst2 Dst1] if Zero Flag is set to 0
ROM 0xC000 0xFFFF
JLT Jump Less Than 0 0000 0101 Dst2 Dst1 Jump to Address[Dst2 Dst1] if Negative Flag is set to 1




JGT Jump Greater Than 0 0000 0110 Dst2 Dst1 Jump to Address[Dst2 Dst1] if Negative Flag is set to 0




JLE Jump Less Or Equal Than 0 0000 0111 Dst2 Dst1 Jump to Address[Dst2 Dst1] if Negative Flag is set to 1 or Zero Flag set to 1




JGE Jump Greater Or Equal Than 0 0000 1000 Dst2 Dst1 Jump to Address[Dst2 Dst1] if Negative Flag is set to 0 or Zero Flag set to 1




LD Load 0001 Dst Src2 Src1 Load Byte from Address[Src2 Src1] into Register Dst




ST Store 0010 Dst2 Dst1 Src Store Byte into Address[Dst2 Dst1] from Register Src




LDI Load Immediate 0011 Dst Imm Imm Load Immediate Imm Byte into Register Dst




ADD Add 0100 Dst Src2 Src1 Dst = Src1 + Src2




SUB Subtract 0101 Dst Src2 Src1 Dst = Src1 - Src2




MUL Multiply 0110 Dst Src2 Src1 Dst = Src1 * Src2




DIV Divide 0111 Dst Src2 Src1 Dst = Src1 / Src2




SHL Shift Left 1000 Dst Src2 Src1 Dst = Src1 << Src2




SHR Shift Right 1001 Dst Src2 Src1 Dst = Src1 >> Src2




NOT Not 1010 Dst Src 0000 Dst = ~Src




AND And 1011 Dst Src2 Src1 Dst = Src1 & Src2




XOR Exclusive Or 1100 Dst Src2 Src1 Dst = Src1 ^ Src2




OR Or 1101 Dst Src2 Src1 Dst = Src1 | Src2






















FLAGS Register

Register Name Bits Visible Input Output Description
Name Bit

R0-R15 Register 0 – Register 15 8 Yes Data Dat/Addr General Purpose Registers
Zero 0

OP-H Current Opcode High 8 No Data Ctrl Unit Stores current executing instruction’s High Byte (0xFF00)
Negative 1

OP-L Current Opcode Low 8 No Data Ctrl Unit Stores current executing instruction’s Low Byte (0x00FF)
Carry 2

IP Instruction Pointer 16 Partially Data Address Stores the address of next instruction
Overflow 3

ALU-A ALU Temporary Register A 8 No Data ALU/Addr Acts as a temporary store for ALU’s 1st input.
Reserved 4







Also used to aid with swapping and addressing past 0xFF (Acts as High Byte)
Reserved 5

ALU-B ALU Temporary Register B 8 No Data ALU/Addr Acts as a temporary store for ALU’s 2nd input.
Reserved 6







Also used to aid with swapping and addressing past 0xFF (Acts as Low Byte)
Reserved 7

FLAGS Flags Register 8 Partially Dat/ALU Dat/CU Stores Flags after ALU execution, used for Jumping instructions and error detection